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Linley Tech Seminar: Embedded Network Security Design

Held April 8, 2009

Free downloads of the seminar proceedings are now available.


    Request a free copy of the presentations by completing the
Registration Form.
     
   

Session 1: Network-Security Design Trends

Bob Wheeler, senior analyst at The Linley Group, will present an overview of security technologies (e.g., VPN, DoS, firewall, IDS/IPS, antivirus), where they are being deployed in the network, and the available merchant silicon for implementing these technologies.

   
   

Session 2: Multicore Processor Architecture in Embedded Security

This session, moderated by Linley Gwennap, examines the application of multicore processors to improving security performance.

     
   

New Architectures for 20Gbps Network Security Applications
   Rajesh "RV" Vaidheeswarran, Director of Application Software Engineering and
   Security Architect, Netronome Systems

Designers of communications equipment face network processing requirements extending beyond simple forwarding, which now include programmable high-performance packet processing with specialized security capabilities. Advanced security applications require support for a wide array of cryptography functions and protocols such as Linksec, IPsec, SSL/TLS and others. This presentation will introduce a new class of Network Flow Processor that delivers 20Gbps of combined L2-L7 programmable network processing and line-rate security functions, enabling a new architecture for the design of switches, routers, security appliances, and wireless-infrastructure devices.

Challenges of Security-Function Implementation in a Multicore Processing Environment
   Piras Thiyagarajan, Software Security Architect, RMI

In this presentation, RMI will explore and discuss the complications and challenges systems developers face in security implementations. The talk will focus on an overall implementation using a multicore SoC processor plus software versus a stand-alone chip implementation.

   
   

Session 3: Designing Secure Platforms

This session, moderated by Bob Wheeler, examines technologies that improve the integrity of corporate, government, or carrier networks beyond traditional VPN implementations.

     
   

FlowThrough Solutions for Implementing Multi-Gigabit Suite B Cryptography
    Ray Savarda, Principal System Architect, Hifn

Today's system designers are tasked with the challenge of integrating security in a cost effective way that doesn't compromise fast time to market or low power requirements. Concurrently, evolving government mandates on security features impose additional requirements on the network infrastructure, and increasing network speeds severely complicate the challenge. In this talk, Hifn will discuss ways for designers to quickly implement truly secure Suite-B solutions for today's threat-filled environment, utilizing a high performance architecture with an optimal balance of cryptographic offload and power utilization.

Building Trust in your Network Infrastructure using Secure Platform Solutions
   Steve Singer, Worldwide Systems Engineering Manager, SafeNet

Until now, the primary emphasis of network security has been placed on communication security. While communication-security solutions prevent eavesdropping, man-in-the-middle attacks, traffic snooping/redirection, fake base-station attacks, and authentication snooping, they do not secure the communication device itself. Increased threats to networking devices and equipment have created a significant demand for platform security to prevent hacking, cloning, modification, and illegal distribution of both devices and device software. In this talk, SafeNet will discuss how networking device, equipment, and semiconductor vendors can address both communications and device protection while maintaining the highest levels of performance using secure platform solutions.

   
   

Session 4: Scaling Performance through Hardware Acceleration

This session, moderated by Bob Wheeler, will examine architectures and techniques for accelerating security functions including content or deep-packet inspection, enabling performance to scale faster than CPU cycles.

     
   

Solutions for Distributed Deep Packet Inspection in Networking Equipment
   Mike Ichiriu, Senior Director of Layer 7 Products, NetLogic Microsystems

Enterprises, governments, and consumers are increasingly reliant on an IP-based network infrastructure for the deployment and management of new services. To secure and guarantee the quality of service of that infrastructure, switches and routers are adding features based on deep packet inspection (DPI), such as security and application-based bandwidth monitoring and management. But traditional DPI architectures have implemented those features using centralized service cards, limiting the traffic that can be inspected. In this talk, NetLogic will discuss new devices and silicon architectures that have the potential to reshape the networking line card by enabling distributed DPI.

Hardware Acceleration 101: Design Considerations for Improving Performance
   Robert McMillen, Distinguished Engineer and Senior System Architect, LSI

LSI will discuss design considerations and tradeoffs in designing a high-performance system incorporating hardware acceleration, including topics such as software-architecture considerations, data movement, latency, preventing locks, and designing for multicore architectures. LSI will discuss how a system designer can take advantage of hardware-accelerated content processing, including obstacles to consider.

Integrated Accelerator Techniques for Security-Appliance Software
   Srini Addepalli, Chief Architect and Freescale Fellow, Software Products Division,
   Freescale

Detecting today’s sophisticated attacks while scaling network throughput requires significantly increasing processing power. Security-appliance software must add DPI/DDI technologies such as IPS/IDS/AV, URL filtering, and application detection. To meet these challenges for next-generation security appliances, processor vendors are integrating acceleration engines to off-load jobs such as crypto processing, pattern matching, and XML-content processing from the CPUs. This presentation approaches the topic from an application software point of view, discussing how hardware acceleration in general, and Freescale’s PowerQUICC and QorIQ families in particular, meet the ever increasing demands of network security appliances.

     
   
    Program last updated: April 10, 2009
     
Request a free copy of the presentations by completing the registration form.

The seminar was intended for system designers, OEMs, network-equipment vendors, service providers, security-software vendors, press, and the financial community.

Information collected for this event will be shared with the sponsors paying for this seminar. This information will not be shared with companies other than the sponsors of this event.

Further questions?   Contact The Linley Group:
Phone: 1.800.413.2881 (toll free in US) or 1.408.281.1947 or email: customer service

 

 









 

 





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